SPIN
2004
Springer
14 years 4 months ago
2004
Springer
Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution
ECRTS
2005
IEEE
14 years 4 months ago
2005
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
CODES
2007
IEEE
14 years 5 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...