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    GLVLSI
    2009
    IEEE
    113views VLSI» more  GLVLSI 2009»
    Reducing parity generation latency through input value aware circuits
    14 years 4 months ago
    Reducing parity generation latency through input value aware circuits
    Download  oergin.etu.edu.tr
    1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
    Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...
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