ISMVL 1999 - PDF Preprint Papers

ISMVL 1999 IEEE International Symposium on Multiple-Valued Logic

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed ISMVL-1999 Paper

click to vote

ISMVL
1999
IEEE

133views Hardware» more ISMVL 1999»

Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead

14 years 3 months ago

Download www.ee.bgu.ac.il

We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...

Andreas Herrfeld, Siegbert Hentschke

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	133	Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead	claim
2	113	Supplementary Symmetrical Logic Circuit Structure	claim
3	93	Synthesis of Multiple-Valued Decision Diagrams using Current-Mode CMOS Circuits	claim
4	90	Transformations between Signed and Classical Clause Logic	claim
5	76	Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates	claim
6	72	Information Relationships and Measures in Application to Logic Design	claim
7	65	Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers