Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages

— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power consumption and enhancing evaluation speed and noise immunity in domino logic circuits. The proposed circuit technique modifies both the upper and lower boundaries of the voltage swing at the dynamic node. Meanwhile, full voltage swing signals are maintained at inputs and outputs for robust and high speed operation. Power supply, ground, and threshold voltages are simultaneously optimized to minimize the power-delay product (PDP). The proposed technique reduces the PDP by up

• Type: Conference
• Year: 2006
• Where: ISQED
• Authors: Zhiyu Liu, Volkan Kursun
• Keywords: Hardware, ISQED 2006, Threshold Voltages, Voltage Swing, Voltage Swing Circuit