Design Optimization of Time-and Cost-Constrained Fault-Tolerant Distributed Embedded Systems

In this paper we present an approach to the design optimization of faulttolerant embedded systems for safety-critical applications. Processes are statically scheduled and communications are performed using the timetriggered protocol. We use process re-execution and replication for tolerating transient faults. Our design optimization approach decides the mapping of processes to processors and the assignment of fault-tolerant policies to processes such that transient faults are tolerated and the timing constraints of the application are satisfied. We present several heuristics which are able to find fault-tolerant implementations given a limited amount of resources. The developed algorithms are evaluated using extensive experiments, including a real-life example.

• Type: Conference
• Year: 2005
• Where: DATE
• Authors: Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Peng
• Keywords: DATE 2005, Design Optimization, Faulttolerant Embedded Systems, Hardware, Transient Faults