Sciweavers

ISCA
2005
IEEE

The V-Way Cache: Demand Based Associativity via Global Replacement

14 years 6 months ago
The V-Way Cache: Demand Based Associativity via Global Replacement
As processor speeds increase and memory latency becomes more critical, intelligent design and management of secondary caches becomes increasingly important. The efficiency of current set-associative caches is reduced because programs exhibit a non-uniform distribution of memory accesses across different cache sets. We propose a technique to vary the associativity of a cache on a per-set basis in response to the demands of the program. By increasing the number of tag-store entries relative to the number of data lines, we achieve the performance benefit of global replacement while maintaining the constant hit latency of a set-associative cache. The proposed variable-way, or VWay, set-associative cache achieves an average miss rate reduction of 13% on sixteen benchmarks from the SPEC CPU2000 suite. This translates into an average IPC improvement of 8%.
Moinuddin K. Qureshi, David Thompson, Yale N. Patt
Added 25 Jun 2010
Updated 25 Jun 2010
Type Conference
Year 2005
Where ISCA
Authors Moinuddin K. Qureshi, David Thompson, Yale N. Patt
Comments (0)