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    FPGA
    2005
    ACM
    195views FPGA» more  FPGA 2005»
    Sparse Matrix-Vector multiplication on FPGAs
    14 years 5 months ago
    Sparse Matrix-Vector multiplication on FPGAs
    Download  www-scf.usc.edu
    Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
    Ling Zhuo, Viktor K. Prasanna
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    FPGA
    2005
    ACM
    97views FPGA» more  FPGA 2005»
    Techniques for synthesizing binaries to an advanced register/memory structure
    14 years 5 months ago
    Techniques for synthesizing binaries to an advanced register/memory structure
    Download  www.cs.ucr.edu
    Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
    Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
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    FPGA
    2005
    ACM
    137views FPGA» more  FPGA 2005»
    HARP: hard-wired routing pattern FPGAs
    14 years 5 months ago
    HARP: hard-wired routing pattern FPGAs
    Download  www.ece.ucsb.edu
    Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
    Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
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    FPGA
    2005
    ACM
    158views FPGA» more  FPGA 2005»
    Automated synthesis for asynchronous FPGAs
    14 years 5 months ago
    Automated synthesis for asynchronous FPGAs
    Download  www.csl.cornell.edu
    We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
    Song Peng, David Fang, John Teifel, Rajit Manohar
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    FPGA
    2005
    ACM
    122views FPGA» more  FPGA 2005»
    Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
    14 years 5 months ago
    Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
    Download  eda.ee.ucla.edu
    Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
    Yan Lin, Fei Li, Lei He
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    FPGA
    2005
    ACM
    95views FPGA» more  FPGA 2005»
    The Stratix II logic and routing architecture
    14 years 5 months ago
    The Stratix II logic and routing architecture
    Download  www.eecg.toronto.edu
    This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...
    David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaugh...
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    FPGA
    2005
    ACM
    215views FPGA» more  FPGA 2005»
    Design, layout and verification of an FPGA using automated tools
    14 years 5 months ago
    Design, layout and verification of an FPGA using automated tools
    Download  www.eecg.toronto.edu
    Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
    Ian Kuon, Aaron Egier, Jonathan Rose
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    FPGA
    2005
    ACM
    121views FPGA» more  FPGA 2005»
    Floating-point sparse matrix-vector multiply for FPGAs
    14 years 5 months ago
    Floating-point sparse matrix-vector multiply for FPGAs
    Download  ic.ese.upenn.edu
    Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...
    Michael DeLorimier, André DeHon
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    FPGA
    2005
    ACM
    90views FPGA» more  FPGA 2005»
    Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
    14 years 5 months ago
    Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
    Download  www.eecg.toronto.edu
    Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
    Andy Gean Ye, Jonathan Rose
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    FPGA
    2005
    ACM
    156views FPGA» more  FPGA 2005»
    Design of programmable interconnect for sublithographic programmable logic arrays
    14 years 5 months ago
    Design of programmable interconnect for sublithographic programmable logic arrays
    Download  ic.ese.upenn.edu
    Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
    André DeHon
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