A Time Predictable Instruction Cache for a Java Processor

Cache memories are mandatory to bridge the growing gap between CPU speed and main memory access time. Standard cache organizations improve the average execution time but are difficult to predict for worst case execution time (WCET) analysis. This paper proposes a different cache architecture, intended to ease WCET analysis. The cache stores complete methods and cache misses occur only on method invocation and return. Cache block replacement depends on the call tree, instead of instruction addresses.

• Type: Conference
• Year: 2004
• Where: OTM
• Authors: Martin Schoeberl
• Keywords: Cache, Cache Memories, Internet Technology, OTM 2004, Standard Cache Organizations