In this paper is described a software technique allowing to detect soft errors occurring in processor-based digital architectures. The detection mechanism is based on a set of rules allowing the transformation of the target application into a new one, having same functionalities but being able to identify bit-flips arising in memory areas as well as those perturbing the processor’s internal registers. Experimental results issued from fault injection sessions and preliminary radiation test campaigns performed in complex DSP processor, provide objective figures about the efficiency of the proposed error detection technique.
B. Nicolescu, Raoul Velazco