DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
In system-level platform-based embedded systems design, the mapping model is a crucial link between the application model and the architecture model. All three models must match w...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
We present an integrated approach that provides fault tolerance and dynamic power management for a real-time task executing in an embedded system. Fault tolerance is achieved thro...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
† Noise performance is a critical analog and RF circuit design constraint, and can impact the selection of the IC system-level architecture. It is therefore imperative that some ...
DATE
2003
IEEE
14 years 5 months ago
2003
IEEE
