A low-power, low-noise CMOS amplifier for neural recording applications

There is a need among scientists and clinicians for lownoise, low-power biosignal amplifiers capable of amplifying signals in the mHz to kHz range while rejecting large dc offsets generated at the electrode-tissue interface. The advent of fully-implantable multielectrode arrays has created the need for fully-integrated micropower amplifiers. We designed and tested a novel bioamplifier that uses a MOS-bipolar pseudo-resistor to amplify signals down to the mHz range while rejecting large dc offsets. We derive the theoretical noise-power tradeoff limit – the noise efficiency factor – for this amplifier and demonstrate that our VLSI implementation approaches that limit. The resulting amplifier, built in a

• Type: Conference
• Year: 2002
• Where: ISCAS
• Authors: Reid R. Harrison
• Keywords: Fully-integrated Micropower Amplifiers, Hardware, ISCAS 2002, Large Dc Offsets, Low-power Biosignal Amplifiers