A New Approach for Computation of Timing Jitter in Phase Locked Loops

A new method for computation of timing jitter in a PLL is proposed. The computational method is based on the representation of the circuit as a linear time-varying system with modulated stationary noise models, spectral decomposition of stochastic process and decomposition of noise into orthogonal components i. e. phase and amplitude noise. The method is illustrated by examples of jitter computation in PLLs.

• Type: Conference
• Year: 2000
• Where: DATE
• Authors: Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Kiran K. Gullapalli, Brian J. Mulvaney
• Keywords: Computational Method, DATE 2000, Hardware, Modulated Stationary Noise, Spectral Decomposition