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DATE
2000
IEEE

Architectural Power Optimization by Bus Splitting

14 years 4 months ago
Architectural Power Optimization by Bus Splitting
– A split-bus architecture is proposed to improve the power dissipation for global data exchange among a set of modules. The resulting bus splitting problem is formulated and solved combinatorially. Experimental results show that the power saving of the split-bus architecture compared to the monolithic-bus architecture varies from 16% to 50%, depending on the characteristics of the data transfer among the modules and the configuration of the split bus. The proposed split-bus architecture can be extended to multi-way split-bus when a large number of modules are to be connected.
Cheng-Ta Hsieh, Massoud Pedram
Added 30 Jul 2010
Updated 30 Jul 2010
Type Conference
Year 2000
Where DATE
Authors Cheng-Ta Hsieh, Massoud Pedram
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