A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement

Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process. The method uses independent strategies for fixing MSB and LSB weights of fixed point signals. It enables short design cycles by combining the strengths of both analytical and simulation based methods.

• Type: Conference
• Year: 1999
• Where: DATE
• Authors: Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens
• Keywords: DATE 1999, Fixed Point, Fixed Point Precision, Hardware, Point Precision