Power scalable processing using distributed arithmetic

A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs can trade off power and arithmetic precision as system requirements change. This work explores the potential of Distributed Arithmetic (DA) cornputation structures for low power precisionon-demand computation. We present two proof-ofconcept VLSI implementations whose power dissipation changes according to the precision of the computation performed.

• Type: Conference
• Year: 1999
• Where: ISLPED
• Authors: Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha Chandrakasan
• Keywords: Average Power Dissipation, Hardware, ISLPED 1999, Low Power, Power Dissipation