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24

GLVLSI
1998
IEEE

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Power Reducing Techniques for Clocked CMOS PLAs

14 years 3 months ago

Power Reducing Techniques for Clocked CMOS PLAs

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Richard F. Hobson

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Added	04 Aug 2010
Updated	04 Aug 2010
Type	Conference
Year	1998
Where	GLVLSI
Authors	Richard F. Hobson

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