Fast Out-Of-Order Processor Simulation Using Memoization

Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First, FastSim uses speculative direct-execution to accelerate the functional emulation of speculatively executed program code. Second, it uses a variation on memoization—a well-known technique in programming language implementation—to cache microarchitecture states and the resulting simulator actions, and then “fast forwards” the simulation the next time a cached state is reached. Fastforwarding accelerates simulation by an order of magnitude, while producing exactly the same, cycle-accurate result as conventional simulation.

• Type: Conference
• Year: 1998
• Where: ASPLOS
• Authors: Eric Schnarr, James R. Larus
• Keywords: ASPLOS 1998, Programming Languages, Simulation, Simulation 8–15 Times, Simulation Accuracy