Sciweavers

ASPLOS
1998
ACM
13 years 11 months ago
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors
Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multipro...
Parthasarathy Ranganathan, Kourosh Gharachorloo, S...
ASPLOS
1998
ACM
13 years 11 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
ASPLOS
1998
ACM
13 years 11 months ago
Segregating Heap Objects by Reference Behavior and Lifetime
Dynamic storage allocation has become increasingly important in many applications, in part due to the use of the object-oriented paradigm. At the same time, processor speeds are i...
Matthew L. Seidl, Benjamin G. Zorn
ASPLOS
1998
ACM
13 years 11 months ago
Fast Out-Of-Order Processor Simulation Using Memoization
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Eric Schnarr, James R. Larus
ASPLOS
1998
ACM
13 years 11 months ago
Overlapping Execution with Transfer Using Non-Strict Execution for Mobile Programs
In order to execute a program on a remote computer, it must first be transferred over a network. This transmission incurs the overhead of network latency before execution can beg...
Chandra Krintz, Brad Calder, Han Bok Lee, Benjamin...
ASPLOS
1998
ACM
13 years 11 months ago
Accelerating Multi-Media Processing by Implementing Memoing in Multiplication and Division Units
This paper proposes a technique that enables performing multi-cycle (multiplication, division, square-root ...) computations in a single cycle. The technique is based on the notio...
Daniel Citron, Dror G. Feitelson, Larry Rudolph
ASPLOS
1998
ACM
13 years 11 months ago
Cache-Conscious Data Placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Brad Calder, Chandra Krintz, Simmi John, Todd M. A...
ASPLOS
1998
ACM
13 years 11 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun
ASPLOS
1998
ACM
13 years 11 months ago
Compiler-Controlled Memory
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
Keith D. Cooper, Timothy J. Harvey
ASPLOS
1998
ACM
13 years 11 months ago
A Cost-Effective, High-Bandwidth Storage Architecture
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...
Garth A. Gibson, David Nagle, Khalil Amiri, Jeff B...