ASPLOS
1998
ACM
14 years 3 months ago
1998
ACM
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
FDL
2007
IEEE
14 years 5 months ago
2007
IEEE
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
ICCAD
2004
IEEE
14 years 8 months ago
2004
IEEE
This paper introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to pr...