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42

GLVLSI
1997
IEEE

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Power Reduction in Large Fan-in CMOS Gates in Logic Arrays Using Selective Precharge

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Power Reduction in Large Fan-in CMOS Gates in Logic Arrays Using Selective Precharge

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Shaoyi Wang

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GLVLSI 1997 | VLSI |

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Added	06 Aug 2010
Updated	06 Aug 2010
Type	Conference
Year	1997
Where	GLVLSI
Authors	Shaoyi Wang

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