Heterogeneous built-in resiliency of application specific programmable processors

Abstract - Using the exibility provided by multiple functionalities we have developed a new approach for permanent fault-tolerance: Heterogeneous BuiltIn-Resiliency (HBIR). HBIR processor synthesis imposes several unique tasks on the synthesis process: (i) latency determination targeting k-unit fault-tolerance, (ii) application-to-faulty-unit matching and (iii) HBIR scheduling and assignment algorithms. We address each of them and demonstrate the eectiveness of the overall approach, the synthesis algorithms, and software implementations on a number of designs.

• Type: Conference
• Year: 1996
• Where: ICCAD
• Authors: Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
• Keywords: Determination Targeting K-unit, Hardware, HBIR Processor Synthesis, ICCAD 1996, Permanent Fault-tolerance