This paper presents a new spectral partitioning formulation which directly incorporates vertex size information. The new formulation results in a generalized eigenvalue problem, a...
A scan-based BIST scheme is presented which guarantees complete fault coverage with very low hardware overhead. A probabilistic analysis shows that the output of an LFSR which fee...
This paper describes an algorithm for the efficient solution of large systems of Boolean equations. The algorithm exploits the fact that, in some cases, the composition operation ...
Many practical routing problems such as BGA, PGA, pin redistribution and test xture routing involve routing with interchangeable pins. These routing problems, especiallypackage la...
A number of low-power designs,such as those for mobile communicationequipment, containswitched-capacitorcircuits. In such designs it is important to be able to estimate the power ...
Chad Young, Giorgio Casinovi, Jonathan Fowler, Pau...
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
In this paper, we propose a method to generate high quality test waveform on chip to avoid the parasitic eects in an analog testability bus test environment. For the test response...
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tz...
This paper introduces GRASP (Generic seaRch Algorithm for the Satisfiability Problem), an integrated algorithmic framework for SAT that unifies several previously proposed searchp...
This paper presents a tutorial on mixed-signal testing. Our focus is on testing the analog portion of the mixed-signal device, as the digital portion is handled in the usual way. ...
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...