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28

ISCAS
1994
IEEE

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Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits

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Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits

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Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj

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Added	09 Aug 2010
Updated	09 Aug 2010
Type	Conference
Year	1994
Where	ISCAS
Authors	Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj

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