In this paper, we propose a new hetero-material stepped gate (HSG) SOI LDMOS in which the gate is divided into three sections - an n+ gate sandwiched between two p+ gates and the gate oxide thickness increases from source to drain. This new device structure improves the inversion layer charge density in the channel, results in uniform electric field distribution in the drift region and reduces the gate to drain capacitance. Using two-dimensional simulation, the HSG LDMOS is designed and compared with the conventional LDMOS. We demonstrate that the proposed device exhibits 28% improvement in breakdown voltage, 32% reduction in on-resistance, 13% improvement in transconductance, 9% reduction in gate to drain charge and 38% reduction in switching delay. HSG LDMOS may be effectively deployed in RF power amplifier applications.