Compositional, efficient caches for a chip multi-processor

In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each other when they share memory and other hardware components. For instance when the tasks share caches and no precautions are taken they potentially flush each other's data at random. In this case the control over the system performance is lost. However, in media processing the performance must be under tight control. In particular the performance of each individual task must be preserved if the tasks are executed concurrently in arbitrary combinations or if additional tasks are added. A system satisfying this property is addressed as being compositional. This paper proposes a novel cache partitioning technique that enhances compostionality. We assume a cache to be a rectangular array of memory elements arranged in "sets" (rows) and "ways" (columns). We perform two partitioning types. Fi...

• Type: Conference
• Year: 2006
• Where: DATE
• Authors: Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven
• Keywords: Cache, Cache Partitioning Technique, DATE 2006, Hardware, Tasks Share Caches