A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The baseband processor operates at an ultra-low supply voltage to reduce energy consumption and utilizes a highly parallelized architecture to meet throughput constraints. While ultralow voltage operation is usually limited to low energy, low performance applications, this work examines how it can be applied to low energy, high performance applications. Measured results for a 20-pJ/bit 100-Mbps UWB baseband processor are presented. Architectural techniques and design methodologies for reducing additional complexity due to parallelism are discussed. Categories and Subject Descriptors
Vivienne Sze, Anantha P. Chandrakasan