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    ISLPED
    2007
    ACM
    91views Hardware» more  ISLPED 2007»
    Evaluating design tradeoffs in on-chip power management for CMPs
    14 years 2 months ago
    Evaluating design tradeoffs in on-chip power management for CMPs
    Download  www.idi.ntnu.no
    Joseph J. Sharkey, Alper Buyuktosunoglu, Pradip Bo...
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    ISLPED
    2007
    ACM
    99views Hardware» more  ISLPED 2007»
    Thermal-aware task scheduling at the system software level
    14 years 2 months ago
    Thermal-aware task scheduling at the system software level
    Download  students.cs.tamu.edu
    Power-related issues have become important considerations in current generation microprocessor design. One of these issues is that of elevated on-chip temperatures. This has an ad...
    Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, H...
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    ISLPED
    2007
    ACM
    169views Hardware» more  ISLPED 2007»
    Throughput of multi-core processors under thermal constraints
    14 years 2 months ago
    Throughput of multi-core processors under thermal constraints
    Download  www.public.asu.edu
    We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
    Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
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    ISLPED
    2007
    ACM
    79views Hardware» more  ISLPED 2007»
    Post-placement leakage optimization for partially dynamically reconfigurable FPGAs
    14 years 2 months ago
    Post-placement leakage optimization for partially dynamically reconfigurable FPGAs
    Download  cc.ee.ntu.edu.tw
    Chi-Feng Li, Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen...
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    ISLPED
    2007
    ACM
    123views Hardware» more  ISLPED 2007»
    A low-power SRAM using bit-line charge-recycling technique
    14 years 2 months ago
    A low-power SRAM using bit-line charge-recycling technique
    Download  online.sfsu.edu
    We propose a new low-power SRAM using bit-line Charge Recycling (CR-SRAM) for the write operation. In the proposed write scheme, differential voltage swing of a bit-line is obtain...
    Keejong Kim, Hamid Mahmoodi, Kaushik Roy
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    ISLPED
    2007
    ACM
    75views Hardware» more  ISLPED 2007»
    Minimizing power dissipation during write operation to register files
    14 years 2 months ago
    Minimizing power dissipation during write operation to register files
    Download  atrak.usc.edu
    This paper presents a power reduction mechanism for the write operation in register files (RegFiles), which adds a conditional charge-sharing structure to the pair of complementar...
    Kimish Patel, Wonbok Lee, Massoud Pedram
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    ISLPED
    2007
    ACM
    142views Hardware» more  ISLPED 2007»
    Clocking structures and power analysis for nanomagnet-based logic devices
    14 years 2 months ago
    Clocking structures and power analysis for nanomagnet-based logic devices
    Download  www.nd.edu
    Michael T. Niemier, M. Alam, Xiaobo Sharon Hu, Gar...
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    ISLPED
    2007
    ACM
    97views Hardware» more  ISLPED 2007»
    Detailed placement for leakage reduction using systematic through-pitch variation
    14 years 2 months ago
    Detailed placement for leakage reduction using systematic through-pitch variation
    Download  vlsicad.ucsd.edu
    We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate le...
    Andrew B. Kahng, Swamy Muddu, Puneet Sharma
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    ISLPED
    2007
    ACM
    92views Hardware» more  ISLPED 2007»
    Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
    14 years 2 months ago
    Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
    Download  cobweb.ecn.purdue.edu
    Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
    Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh
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    ISLPED
    2007
    ACM
    84views Hardware» more  ISLPED 2007»
    Towards a software approach to mitigate voltage emergencies
    14 years 2 months ago
    Towards a software approach to mitigate voltage emergencies
    Download  www.eecs.harvard.edu
    Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. One a...
    Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
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