A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip

This paper presents a process variation tolerant, SoC ready, 1GS/s, 6 bit flash analog-to-digital converter (ADC) suitable for integration into nanoscale digital CMOS technologies. The physical de

• Type: Conference
• Year: 2008
• Where: GLVLSI
• Authors: Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
• Keywords: GLVLSI 2008, Nanoscale Digital Cmos, Process Variation Tolerant, VLSI, flash Analog-to-digital Converter