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    Modular Synthesis of Timed Circuits using Partial Order Reduction

    13 years 11 months ago
    Modular Synthesis of Timed Circuits using Partial Order Reduction
    Download  www.async.ece.utah.edu
    Eric Mercer, Chris J. Myers, Tomohiro Yoneda
    claim paper
    Added 18 Dec 2010
    Updated 18 Dec 2010
    Type Journal
    Year 2002
    Where ENTCS
    Authors Eric Mercer, Chris J. Myers, Tomohiro Yoneda
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