On-line fault detection for bus-based field programmable gate arrays

Abstract—We introduce a technique for on-line built-in selftesting (BIST) of bus-based field programmable gate arrays (FPGA’s). This system detects deviations from the intended functionality of an FPGA without using special-purpose hardware, hardware external to the device, and without interrupting system operation. Such a system would be useful for mission-critical applications with resource constraints. The system solves these problems through an on-line fault scanning methodology. A device’s internal resources are configured to test for faults. Testing scans across an FPGA, checking a section at a time. Simulation on a model FPGA supports the viability and effectiveness of such a system.

• Type: Journal
• Year: 1998
• Where: TVLSI
• Authors: N. R. Shnidman, William H. Mangione-Smith, Miodrag Potkonjak
• Keywords: Fault Scanning Methodology, FPGA, TVLSI 1998, field Programmable Gate