TVLSI
1998
13 years 11 months ago
1998
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
TVLSI
1998
13 years 11 months ago
1998
—In this paper, we propose a robust register-transfer level (RTL) power modeling methodology for functional units. Our models are consistently accurate over a wide range of input...
TVLSI
1998
13 years 11 months ago
1998
Abstract—We introduce a technique for on-line built-in selftesting (BIST) of bus-based field programmable gate arrays (FPGA’s). This system detects deviations from the intende...
TVLSI
1998
13 years 11 months ago
1998
TVLSI
1998
13 years 11 months ago
1998
Abstract— The growing popularity of look-up table (LUT)based field programmable gate arrays (FPGA’s) has renewed the interest in functional or Roth–Karp decomposition techni...
TVLSI
1998
13 years 11 months ago
1998
TVLSI
1998
13 years 11 months ago
1998
— This paper presents a solution to the problem of reducing the power dissipated by a digital system containing an intellectual proprietary core processor which repeatedly execut...
TVLSI
1998
13 years 11 months ago
1998
TVLSI
1998
13 years 11 months ago
1998
— This paper proposes a methodology, implemented in a tool, to automatically generate the main classes of error control codes (ECC’s) widely applied in computer memory systems ...
TVLSI
1998
13 years 11 months ago
1998
— The need for low-power embedded systems has become very significant within the microelectronics scenario in the most recent years. A power-driven methodology is mandatory duri...