An HDL-synthesized gated-edge-injection PLL with a current output DAC

– This paper presents a small area, low power, fully synthesizable PLL with a current output DAC and an interpolative-phase coupled oscillator using edge injection technique for on-chip clock generation. A prototype PLL is fabricated in a

• Type: Journal
• Year: 2015
• Where: ASPDAC
• Authors: Dongsheng Yang, Wei Deng, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa
• Keywords: ASPDAC 2015, Hardware