Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

19

ICCAD
2005
IEEE

favoriteEmaildiscussreport

79views Hardware» more ICCAD 2005»

Storage assignment during high-level synthesis for configurable architectures

14 years 7 months ago

Storage assignment during high-level synthesis for configurable architectures

Download www.ece.ucsb.edu

Wenrui Gong, Gang Wang, Ryan Kastner

Real-time Traffic

Hardware | ICCAD 2005 |

claim paper

Related Content

» Scheduling RegisterAllocated Codes in UserGuided HighLevel Synthesis

» Integrated OnChip Storage Evaluation in ASIP Synthesis

» Constraint Satisfaction for Relative Location Assignment and Scheduling

» Synthesis of Multimode digital signal processing systems

Post Info
More Details (n/a)

Added	16 Mar 2010
Updated	16 Mar 2010
Type	Conference
Year	2005
Where	ICCAD
Authors	Wenrui Gong, Gang Wang, Ryan Kastner

Comments (0)