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ICCAD
2004
IEEE

Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems

14 years 8 months ago
Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems
In this paper, we propose a new technique for the combined voltage scaling of processors and communication links, taking into account dynamic as well as leakage power consumption. The voltage scaling technique achieves energy efficiency by simultaneously scaling the supply and body bias voltages in the case of processors and buses with repeaters, while energy efficiency on fat wires is achieved through dynamic voltage swing scaling. We also introduce a set of accurate communication models for the energy estimation of voltage scalable embedded systems. In particular, we demonstrate that voltage scaling of bus repeaters and dynamic adaption of the voltage swing on fat wires can significantly influence the system’s energy consumption. Experimental results, conducted on numerous generated benchmarks and a real-life example, demonstrate that substantial energy savings can be achieved with the proposed techniques.
Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Z
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2004
Where ICCAD
Authors Alexandru Andrei, Marcus T. Schmitz, Petru Eles, Zebo Peng, Bashir M. Al-Hashimi
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