ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
In this paper we describe a stochastic integral equation method for computing the mean value and the variance of capacitance of interconnects with random surface roughness. An ens...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
Abstract—The slack time in real-time systems can be used by recovery schemes to increase system reliability as well as by frequency and voltage scaling techniques to save energy....
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
— A radiation hardening technique for combinational logic circuits is described. The key idea is to exploit the asymmetric logical masking probabilities of gates, hardening gates...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
It has been widely recognized that the dynamic range information of an application can be exploited to reduce the datapath bitwidth of either processors or ASICs, and therefore th...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
Self-calibrating designs are gaining momentum in both the computation and communication worlds. Instead of relying on the worst-case characterisation of design parameters, self-ca...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
We address the classic wire-length estimation problem and propose a new statistical wire-length estimation approach that captures the probability distribution function of net leng...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
Ana/ytic placement methods that simultaneously minimize wire length and spread cells are receiving renewedattention from both academia and industiy In thispaper we describe the im...
ICCAD
2004
IEEE
14 years 7 months ago
2004
IEEE
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...