Embedded Harmonic Control for Trajectory Planning in Large Environments

This paper presents an embedded FPGA–based architecture to compute navigation trajectories along a harmonic potential. The goals and obstacles may be changed during computation. Large environments are split into blocks. This approach, together with the use of an increasing precision, enables an optimization of the overall computation time that is theoretically and experimentally studied. Implementation results confirm outstanding speedup factors.

• Type: Conference
• Year: 2008
• Where: RECONFIG
• Authors: Cesar Torres-Huitzil, Bernard Girau, Amine M. Boumaza, Bruno Scherrer
• Keywords: Embedded Fpga–based Architecture, Outstanding Speedup Factors, Overall Computation Time, RECONFIG 2008, Reconfigurable Computing