OPC-Friendly Bus Driven Floorplanning

In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/vertical wires with identical widths. The positions of buses must be carefully designed so that the related blocks can connect to the buses with short connections. Meanwhile, as technologies march into deep sub-micron, sub-wavelength lithography causes many issues in lithographic processes. Off axis illumination (OAI) brings up the forbidden pitch issue, which could lower the yield substantially. In this paper, we first propose a litho model so that the optimal pitch can be efficiently computed for each bus. Then we present an exact algorithm to find the optimal position of a bus such that the total length of bus connections, i.e., connections from block centers to the buses, is minimized. The running time is O(klnk) where k is the number of blocks that the bus connects. Next, we propose a linear programmin...

• Type: Conference
• Year: 2007
• Where: ISQED
• Authors: Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. Wong
• Keywords: Bus Assignment, Bus Connections, Hardware, ISQED 2007, OPC-friendly Bus Assignment