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ITC
2002
IEEE

Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems

14 years 4 months ago
Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems
Ganapathy Parthasarathy, Madhu K. Iyer, Tao Feng,
Added 15 Jul 2010
Updated 15 Jul 2010
Type Conference
Year 2002
Where ITC
Authors Ganapathy Parthasarathy, Madhu K. Iyer, Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Magdy S. Abadir
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