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12

ITC
2002
IEEE

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Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems

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Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems

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Ganapathy Parthasarathy, Madhu K. Iyer, Tao Feng,

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Added	15 Jul 2010
Updated	15 Jul 2010
Type	Conference
Year	2002
Where	ITC
Authors	Ganapathy Parthasarathy, Madhu K. Iyer, Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Magdy S. Abadir

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