Compositional Memory Systems for Data Intensive Applications

To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set based cache partitioning. We evaluate our approach on a CAKE platform with three Trimedias and one MIPS using a picture in picture benchmark and comparing the performance implications of two types of cache partitioning. Our experiments show in associativity based cache partitioning case at least 30% performance degradation, whereas in set-based partitioning case there is a 27% performance improvement when compared to non-partitioned caches.

• Type: Conference
• Year: 2004
• Where: DATE
• Authors: Anca Mariana Molnos, Marc J. M. Heijligers, Sorin Cotofana, Jos T. J. van Eijndhoven
• Keywords: Cache Partitioning, Cache Partitioning Case, DATE 2004, Hardware, Partitioning Case