An Efficient Low-Degree RMST Algorithm for VLSI/ULSI Physical Design

Motivated by very/ultra large scale integrated circuit (VLSI/ULSI) physical design applications, we study the construction of rectilinear minimum spanning tree (RMST) with its maximum vertex degree as the constraint. Given a collection of n points in the plane, we firstly construct a graph named the bounded-degree neighborhood graph (BNG). Based on this framework, we propose an O(n log n) algorithm to construct a 4-BDRMST (RMST with maximum vertex degree ≤ 4). This is the first 4-BDRMST algorithm with such a complexity, and experimental results show that the algorithm is significantly faster than the existing 4-BDRMST algorithms.

• Type: Conference
• Year: 2004
• Where: PATMOS
• Authors: Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xiaodong Hu, Guiying Yan
• Keywords: Maximum Vertex Degree, Minimum Spanning Tree, PATMOS 2004, Scale Integrated Circuit