Efficient Techniques for Directed Test Generation Using Incremental Satisfiability

Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time and resources required for directed test generation can be prohibitively large. This paper presents an efficient test generation methodology using incremental satisfiability. The existing researches have used incremental SAT to improve counterexample (test) generation involving only one property with different bounds. This paper is the first attempt to utilize incremental satisfiability in directed test generation involving multiple properties. The contribution of this paper is a novel methodology to share learning across multiple properties by developing efficient techniques for property clustering, name substitution, and selective forwarding of conflict clauses. Our experimental results using both software and hardware benchmarks demonstrate that our approach can drastically (on average four times) reduce t...

• Type: Conference
• Year: 2009
• Where: VLSID
• Authors: Prabhat Mishra, Mingsong Chen
• Keywords: Computer Aided Design, Directed Test Generation, Test Generation Methodology, Test Generation Time, VLSID 2009