A faster approximation scheme for timing driven minimum cost layer assignment

As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignment manifests enormous potential in drastically reducing wire delay. This is due the fact that wires on thick metals are much less resistive than those on thin metals. Nevertheless, it is not desired to assign all wires to thick metals and the right strategy is to only use minimal thick-metal routing resources for meeting the timing constraints. This timing driven minimum cost layer assignment problem is NP-Complete, and a fast algorithm with provable approximation bound is highly desired. In this paper, a new fully polynomial time approximation scheme is proposed. It is based on a linear-time dynamic programming algorithm for bounded-cost layer assignment and efficient oracle queries. The proposed algorithm can approximate the optimal layer assignment solution in O(mn2 / ) time within a factor of 1+ for any &g...

• Type: Conference
• Year: 2009
• Where: ISPD
• Authors: Shiyan Hu, Zhuo Li, Charles J. Alpert
• Keywords: Algorithm, Fully Polynomial Time Approximation Scheme, Hardware, ISPD 2009, Layer Assignment