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20

GLVLSI
1996
IEEE

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FPGA-based high performance page layout segmentation

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FPGA-based high performance page layout segmentation

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Nalini K. Ratha, Anil K. Jain, Diane T. Rover

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GLVLSI 1996 | VLSI |

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Added	07 Aug 2010
Updated	07 Aug 2010
Type	Conference
Year	1996
Where	GLVLSI
Authors	Nalini K. Ratha, Anil K. Jain, Diane T. Rover

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