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    GLVLSI
    1996
    IEEE
    103views VLSI» more  GLVLSI 1996»
    A Modular Architecture for Real Time HDTV Motion Estimation with Large Search Range
    13 years 11 months ago
    A Modular Architecture for Real Time HDTV Motion Estimation with Large Search Range
    Download  www.vtvt.ece.vt.edu
    Hangu Yeo, Yu Hen Hu
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    GLVLSI
    1996
    IEEE
    125views VLSI» more  GLVLSI 1996»
    Performance-Driven Interconnect Global Routing
    13 years 11 months ago
    Performance-Driven Interconnect Global Routing
    Download  www.eecs.berkeley.edu
    In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
    Dongsheng Wang, Ernest S. Kuh
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    GLVLSI
    1996
    IEEE
    91views VLSI» more  GLVLSI 1996»
    Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs
    13 years 11 months ago
    Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs
    Download  users.encs.concordia.ca
    Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Ed...
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    GLVLSI
    1996
    IEEE
    128views VLSI» more  GLVLSI 1996»
    Delay Hazards in Complex Gate Based Speed Independent VLSI Circuits
    13 years 11 months ago
    Delay Hazards in Complex Gate Based Speed Independent VLSI Circuits
    Download  www.cecs.uci.edu
    Nozar Tabrizi, Michael J. Liebelt, Kamran Eshraghi...
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    GLVLSI
    1996
    IEEE
    126views VLSI» more  GLVLSI 1996»
    An Accurate Interconnection Length Estimation for Computer Logic
    13 years 11 months ago
    An Accurate Interconnection Length Estimation for Computer Logic
    Download  escher.elis.ugent.be
    Important layout properties of electronic designs include space requirements and interconnection lengths. A reliable interconnection length estimation is essential for improving p...
    Dirk Stroobandt, Herwig Van Marck, Jan Van Campenh...
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    GLVLSI
    1996
    IEEE
    88views VLSI» more  GLVLSI 1996»
    A High Speed VLSI Architecture for Scaleable ATM Switches
    13 years 11 months ago
    A High Speed VLSI Architecture for Scaleable ATM Switches
    Download  www.cecs.uci.edu
    Paul Shipley, Sherif Sayed, Magdy A. Bayoumi
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    GLVLSI
    1996
    IEEE
    102views VLSI» more  GLVLSI 1996»
    FPGA-based high performance page layout segmentation
    13 years 11 months ago
    FPGA-based high performance page layout segmentation
    Download  www.cecs.uci.edu
    Nalini K. Ratha, Anil K. Jain, Diane T. Rover
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    GLVLSI
    1996
    IEEE
    103views VLSI» more  GLVLSI 1996»
    A Parametrical Architecture for Reed-Solomon Decoders
    13 years 11 months ago
    A Parametrical Architecture for Reed-Solomon Decoders
    Download  www.cs.york.ac.uk
    Mariana-Eugenia Petre, Guido Masera
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    GLVLSI
    1996
    IEEE
    77views VLSI» more  GLVLSI 1996»
    A Parameterized Index-Generator for the Multi-Dimensional Interleaving Optimization
    13 years 11 months ago
    A Parameterized Index-Generator for the Multi-Dimensional Interleaving Optimization
    Download  www.cecs.uci.edu
    Nelson L. Passos, Edwin Hsing-Mean Sha
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    GLVLSI
    1996
    IEEE
    91views VLSI» more  GLVLSI 1996»
    Macromodeling C- and RC-loaded CMOS inverters for timing analysis
    13 years 11 months ago
    Macromodeling C- and RC-loaded CMOS inverters for timing analysis
    Download  www.cecs.uci.edu
    Ayman I. Kayssi
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