GreenBus: a generic interconnect fabric for transaction level modelling

In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have analysed, which are common in todays system on chip environments, and require to be modelled at a transaction level. Second our findings in terms of the data structures and interface API's that are required in order to model those (and we believe other) busses and IO structures. Third the surrounding infrastructure that we believe can, and should be in place to support the modelling of those busses and IO structures. We will present the infrastructure that we have built, and indicate where our future work will head. Categories and Subject Descriptors: B.8.2 [Performance and Reliability]: Performance Analysis and Design Aids General Terms: Design, Performance, Verification

• Type: Conference
• Year: 2006
• Where: DAC
• Authors: Wolfgang Klingauf, Robert Günzel, Oliver Bringmann, Pavel Parfuntseu, Mark Burton
• Keywords: DAC 2006, Design Automation, Generic Interconnect Fabric, IO Structures, Transaction Level