Hardware Results Demonstrating Defect Detection Using Power Supply Signal Measurements

The power supply transient signal (IDDT) method that we propose for defect detection analyze regional signal variations introduced by defects at a set of power supply pads on the chip under test (CUT). The method is based on the comparison of the CUT with a few chips that have been shown to be defect free. Simulation data obtained from an extracted R-model of the CUTs power grid is used to calibrate for probe card contact parasitic. Multiple defect free chips are analyzed to establish a statistical metric that distinguishes between defective behavior and process variation. This paper presents hardware results that demonstrate the effectiveness of a geometry based defect detection technique using nine copies of a test chip, eight of which were used as defect free chips and the ninth one treated as a chip with emulated defects. The method is evaluated under a variety of test scenarios to determine the sensitivity of the technique.

• Type: Conference
• Year: 2005
• Where: VTS
• Authors: Dhruva Acharyya, Jim Plusquellic
• Keywords: Chip, Defect Detection, Defect Free Chips, VTS 2005