Hierarchical Identification of Untestable Faults in Sequential Circuits

Similar to sequential test pattern generation, the problem of identifying untestable faults in sequential circuits remains unsolved. Most of the previous works in untestability identification operate at the logic-level and, thus, the methods do not scale. Current paper points out a new class of sequentially untestable faults, called register input logic stuck-on faults. We show that it is possible to identify such faults from the registertransfer level (RTL) description of the circuit. Moreover, we prove by experiments that the considered faults form a large subclass of all the untested faults.

• Type: Conference
• Year: 2007
• Where: DSD
• Authors: Jaan Raik, Raimund Ubar, Anna Krivenko, Margus Kruus
• Keywords: DSD 2007, Hardware, Logic Stuck-on Faults, Untestable Faults, Untested Faults