Interconnect lifetime prediction under dynamic stress for reliability-aware design

Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and reliability. While many interconnect reliability models assume a constant temperature, this paper presents a physics-based model for estimating interconnect lifetime for any time-varying temperature/current profile. This model is verified with numerical solutions. With this model, we show that designers may be more aggressive with the temperature profiles that are allowed on a chip. In fact, our model reveals that when the temperature magnitude variation is small, average temperature (instead of worst-case temperature) can be used to accurately predict interconnect lifetime, allowing for significant design margin reclamation in reliability-aware design. Even when the variation of temperature magnitude is large, our model shows that using the maximum temperature is still too conservative for interconnect ...

• Type: Conference
• Year: 2004
• Where: ICCAD
• Authors: Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, Kevin Skadron
• Keywords: Hardware, ICCAD 2004, Interconnect Lifetime, Interconnect Lifetime Prediction, Temperature Magnitude Variation