Physical Register Reference Counting

—Several recently proposed techniques including CPR (Checkpoint Processing and Recovery) and NoSQ (No Store Queue) rely on reference counting to manage physical registers. However, the register reference counting mechanism itself has received surprisingly little attention. This paper fills this gap by describing potential register reference counting schemes for NoSQ, CPR, and a hypothetical NoSQ/CPR hybrid. Although previously described in terms of binary counters, we find that reference counts are actually more naturally represented as matrices. Binary representations can be used as an optimization in specific situations. I. OVERVIEW ynamically-scheduled processors with unified physical register files use a simple algorithm to free physical registers: registers are unconditionally added to a free list at instruction commit and squash. Several proposed techniques require a more flexible physical register reclamation mechanism: physical register reference counting. Here, instruc...

• Type: Journal
• Year: 2007
• Where: CAL
• Authors: A. Roth
• Keywords: CAL 2007, CAL 2008, Physical Register, Reference Counts, Register Reference