Through Silicon Via-Based Grid for Thermal Control in 3D Chips

3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between processing cores, and an effective way to diminish this impact on communication is the 3D integration technology and the use of through-silicon vias (TSVs) for inter-layer communication. However, 3D chips present important ther- mal issues due to the presence of processing units with a high power density, which are not homogeneously distributed in the stack. Also, the presence of hot-spots creates thermal gradients that impact negatively on the system reliability and relate with the leakage power consumption. Thus, new approaches for thermal control of 3D chips are in great need. This paper discusses the use of a grid and non-uniform placement of TSVs as an effective mechanism for thermal balancing and control in 3D chips. We have modelled the material layers and TSVs mathematically using a detailed calibr...

• Type: Conference
• Year: 2009
• Where: NANONET
• Authors: José L. Ayala, Arvind Sridhar, Vinod Pangracious, David Atienza, Yusuf Leblebici
• Keywords: Chips, Integration Technology, NANONET 2009, Thermal